The present invention generally relates to semiconductor devices and more particularly to a semiconductor device having a high dielectric film (so-called high-K dielectric film) formed of metal oxide or metal silicate and fabrication process thereof.
In the semiconductor integrated circuit devices for use for ultra fast operation such as CMOS LSIs, the field effect transistors (MOSFETs) constituting the semiconductor integrated circuit are required to have a very short gate length, and thus, intensive efforts have been made for miniaturization of MOSFETs.
Meanwhile, with such highly miniaturized MOSFETs, there is further imposed a constraint on the film thickness of the gate insulation film from scaling law, and there is a demand that the thickness of the gate insulation film is reduced to 2.5 nm or less in terms of the equivalent oxide film thickness.
Conventionally, a silicon oxide film characterized by excellent leakage current characteristics and low interface state density has been used for the gate insulation film.
However, with such a conventional gate insulation film of silicon oxide, there arises a problem of increased direct tunneling current with the decrease of physical thickness of the gate insulation film, and the problem of gate leakage current caused by tunneling current emerges as a paramount problem when the thickness of the gate insulation film has been decreased further from the foregoing value. With increase of the gate leakage current, there arises a substantial leakage current in the gate-off operational mode, and the semiconductor device no longer operates properly or there may be caused excessive increase of power consumption.
Thus, in order to solve the foregoing problems, investigations have been made on the use of high dielectric materials such as metal oxide or metal silicate having a high dielectric constant (referred to hereinafter as high-K dielectric film) for the material of the gate insulation film.
Conventionally, such a high-K dielectric film has been formed by an MOCVD process or atomic layer CVD (so-called ALD) process at the substrate temperature of 200-600° C. With the ALD process, it is possible to grow the high-K dielectric film one atomic layer by one atomic layer, by causing chemical adsorption of the source compound containing the metal element constituting the high-K dielectric film on the surface of the substrate to be processed, by supplying the source compound in the form of a source gas, followed by oxidation conducted by an oxidizing gas such as H2O. By using such a film formation technology conducted at low temperature, it is now possible to grow a high-K dielectric film of excellent morphology characterized by uniform film thickness. Further, it is possible to obtain a high-K dielectric film of uniform thickness also by an MOCVD process.
On the other hand, the fabrication process of a semiconductor device includes plural ion injection processes in addition to such a formation process of high-K dielectric film, while it should be noted that an ion implantation process is inevitably accompanied with a rapid thermal annealing process conducted at about 1000° C., typically 1050° C., for activation of the impurity element introduced into the device region of the semiconductor substrate.
Thus, in the semiconductor device having such a gate insulation film of high-K dielectric film, the high-K dielectric gate insulation film has to maintain the excellent electric properties after such high temperature annealing process has been applied.
Further, in the case the gate insulation film contains defects such as fixed charges or interface states, there occurs trapping of carries by such fixed charges or interface states, leading to the problem of shift in the flat-band voltage or change of the threshold characteristics. Further, there is caused a large leakage current through these defects, and the reliability of the semiconductor device is degraded seriously. Thus, in the high-K dielectric gate insulation films, too, it is necessary that the film is free from fixed electric charges or interface states similarly to the case of conventional thermal oxide film.
However, the high-K dielectric film formed by such low temperature MOCVD or ALD process is an amorphous film, and while it has excellent morphology in a first glance, there is often the case that the film contains various defects in fact. Particularly, the film formed by an ALD process that uses H2O for the oxidizing agent tends to contain a large amount of OH group in the film.
Thus, in the investigation constituting the foundation of the present invention, the inventor of the present invention has made an investigation in which the high-K dielectric film of amorphous state and containing a large amount of defects is subjected to a thermal annealing process under the condition identical to the one used in the actual activation process of impurity elements, and observed the change of the film characteristics.
FIG. 1A shows the cross-sectional TEM image of an HfO2 film formed by an ALD process in the foregoing investigation constituting the foundation of the present invention.
Referring to FIG. 1A, the HfO2 film is formed on a silicon substrate carrying thereon an interface oxide film (thermal oxide film) having a thickness of 1 nm, by repeating the process of supplying a HfCl4 gas and a H2O gas alternately with intervening purging step as shown in FIG. 2 at the substrate temperature of 300° C. so as to have the film thickness of 3 nm.
On the other hand, FIG. 1B shows the cross-sectional TEM image of the HfO2 film of FIG. 1A after conducting an annealing process at 700° C. in a nitrogen gas ambient, followed by a further annealing process conducted at 1050° C. for 10 seconds.
Referring to FIG. 1B, there is caused a remarkable cohesion in the HfO2 film on the silicon substrate as a result of the thermal annealing process conducted at such high temperature, and the continuous film morphology of the HfO2 film with uniform thickness shown in FIG. 1A is lost. Further, associated with this, there is caused significant increase of leakage current with the structure of FIG. 1B. This means that the HfO2 film of FIG. 1A, while having excellent morphology at a first glance, in fact contains large amount of defects in the film, and there is caused a large scale migration of atoms with the thermal annealing process via such defects. Such a film cannot be used for the gate insulation film of the high-speed semiconductor device.
In the TEM image of FIGS. 1A and 1B, it should be noted that the lattice image is resolved in the silicon substrate.
Patent Reference 1 Japanese Laid-Open Patent Application 11-177057
Patent Reference 2 Japanese Laid-Open Patent Application 2001-152339